Interrupts & MMIO (std::interrupt) #

std/interrupt/ covers the software-managed side of interrupt handling — vector tables, ISR registration/dispatch, MMIO register access, bitfield manipulation, and clock configuration — complementing the peripheral drivers in std::hal. All freestanding-safe.

#include <std/interrupt/mmio.h>
#include <std/interrupt/bitfield.h>

void configure_uart(&volatile unsigned int uart_base) {
    struct MmioReg ctrl = std::MmioReg::at(uart_base);
    unsigned int baud_field = ctrl.read_field(0, 15);
    ctrl.write_field(0, 15, baud_field | 1u);

    unsigned int combined = std::bf_insert32(0, 4, 7, 0xA);
}

MMIO (interrupt/mmio.h) #

Register addresses are &volatile references (&volatile unsigned int for 32-bit registers), created from a fixed address inside unsafe once — see HAL for the pattern.

Two equivalent APIs over the same operations: a MmioReg struct (MmioReg::at(addr) to construct, then methods) for grouping several accesses to one register, and free functions for one-off access.

The 8- and 16-bit accessors make 8- and 16-bit bus accesses, so they never touch neighbouring registers. Field helpers accept the full width, (0, 31).

Bitfield Helpers (interrupt/bitfield.h) #

Pure functions for register bit manipulation — bf_extract32(val, lo, hi), bf_insert32(val, lo, hi, field), bf_set32/bf_clear32/bf_toggle32 (bits [hi:lo]), bf_test32(val, n) (single-bit test), bf_mask32(lo, hi) (build a mask with no register access), bf_popcount32(val).

ISR Vector Table (interrupt/isr.h) #

A software dispatch table distinct from the hardware vector table below — IsrTable holds up to ISR_MAX (256) fn void() handlers:

static void uart_rx_isr() { /* ... */ }

struct IsrTable table = std::IsrTable::new();
table.register_(3, uart_rx_isr);   // trailing underscore: 'register' is a C keyword
// re-registering an IRQ replaces its handler
...
if (table.dispatch(3)) { /* handler ran */ }

Plus irq_disable()/irq_enable(), which mask and unmask IRQs at the CPU on bare-metal targets: cpsid i/cpsie i (ARM), msr daifset/daifclr, #2 (AArch64), clearing/setting mstatus.MIE (RISC-V) and cli/sti (x86). They need privileged mode; in a hosted process they are only compiler barriers.

Hardware Vector Table (interrupt/vector_table.h) #

VectorTable (global instance vtable) is the actual CPU-recognized vector table — install(index, handler)/remove(index)/get(index) to populate it, dispatch(index) to invoke a slot's handler (or the default handler, set via set_default()), and vtable_activate() to point the CPU at it:

vtable_init() sets every slot to vtable_default_handler (a weak, infinite-loop fault handler meant to be overridden per project) before use. set_default(handler) also retargets every slot still holding the previous default, and dispatch() of an empty or out-of-range index calls the current default.

VTABLE_MAX_VECTORS is 256 entries (Cortex-M: 16 core exceptions plus up to 240 external IRQs).

Clock Configuration (interrupt/clock.h) #

ClockConfig (via ClockConfig::new(base)) — set_source() (CLK_SRC_HSI/ CLK_SRC_HSE/CLK_SRC_PLL), configure_pll(mul, div), set_ahb_div/ set_apb1_div/set_apb2_div (bus prescalers), get_freq().