Module simd::aarch64

std::simd, AArch64 convenience layer

Pure naming/documentation layer over std/simd/simd.h's portable vec<T,N>-based types and functions — LLVM's AArch64 backend lowers every operation in simd.sc directly to NEON (Advanced SIMD) instructions on the 32 128-bit v0-v31 registers (fadd/fmul .4s/.2d forms, etc.) from the portable source; there is no separate hand-written implementation here.

NEON registers are natively 128-bit — unlike x86_64's AVX, there is no 256-bit hardware vector register, so the *x8 float32 / *x4 float64 types below are provided for API symmetry with the other per-ISA headers, but LLVM lowers them as a pair of 128-bit NEON operations (still correct, just two instructions instead of one). Prefer the 128-bit-native aliases (v4f32, v16i8, v2f64, ...) when writing AArch64-focused code.