std1.0.0-beta-7 SafeC docs

std :: ml::gpu_miopen

Struct std::RocmHalfConv2D

#include <std/ml/gpu_miopen.h> source

struct RocmHalfConv2D {
    struct RocmHalfBuf weight;
    struct RocmHalfBuf bias;
    unsigned long inChannels;
    unsigned long outChannels;
    unsigned long kH;
    unsigned long kW;
    unsigned long stride;
    unsigned long padding;
}

The same convolution on 16-bit NCHW tensors (gpu_rocm.h's RocmHalfBuf): MIOpen's half / bfloat16 kernels, which accumulate in fp32 and round once per output; the bias add and ReLU are one fused 16-bit kernel (rocm_half_bias). Weights are rounded from a Conv2D's fp32 ones on upload. x, y and the layer must share one dtype.

Fields

§struct RocmHalfBuf weightsource
§unsigned long inChannelssource
§unsigned long outChannelssource
§unsigned long kHsource
§unsigned long kWsource
§unsigned long stridesource
§unsigned long paddingsource

Methods

§void free()source · definition
§int forward( struct RocmHalfBuf x, struct RocmHalfBuf y, unsigned long batch, unsigned long height, unsigned long width, ) constsource · definition
§int forward_relu( struct RocmHalfBuf x, struct RocmHalfBuf y, unsigned long batch, unsigned long height, unsigned long width, ) constsource · definition
§static struct RocmHalfConv2D upload(const &Conv2D layer, int dtype)source · definition

ROCM_FP16 / ROCM_BF16