Watchdog Timer HAL
Hardware watchdog feed/enable. Freestanding-safe.
Watchdog<C> is generic over the watchdog block, a compile-time chip type:
WatchdogGeneric reference layout: CTRL +0x00 (bit 0 enable), TIMEOUT
+0x04, FEED +0x08 (write 0x6969), STATUS +0x0C (bit 0:
last reset was a watchdog reset)
Stm32F4Iwdg STM32 independent watchdog (KR/PR/RLR/SR): 'timeout'
is the 12-bit reload value, counted at LSI / 256
(~8 ms per unit at 32 kHz); caused_reset() reads
RCC_CSR.IWDGRSTF at STM32F4's RCC address