Module hal::i2c
I2C HAL Polling-based I2C master driver. Freestanding-safe.
I2cBus<C> is generic over the I2C block, a compile-time chip type:
I2cGeneric reference layout: DATA +0x00, STATUS +0x04 (bit 0 busy,
bit 1 ACK, bit 2 error), CTRL +0x08 (1 START, 2 STOP,
4 SEND, 8 READ+ACK, 16 READ+NACK), ADDR +0x0C, SPEED +0x10
Stm32F4I2c STM32F1/F2/F4 I2C ("v1": CR1/CR2/DR/SR1/SR2/CCR/TRISE),
standard (<= 100 kHz) and fast (<= 400 kHz) mode
Every transfer ends with STOP, also when it fails, so the bus is released.
Structs
| I2cGeneric | |
| Stm32F4I2c | |
| I2cBus |
Traits
| I2cChip | What an I2C controller type provides; I2cBus<C> requires it. |
Macros
| I2C_OK | I2C result codes |
| I2C_NACK | |
| I2C_ERROR |